The present invention relates to a method for manufacturing a circuit board, and in particular, to a method for manufacturing a circuit board having a conductive via that is filled with an adequate amount of a conductive material to provide an electrical connection.
Built-up, or multilayered, circuit boards having an insulating layer and a conductive circuit layer alternately laminated on a base substrate on the surface of which a conductive circuit is formed are known. For such circuit boards, generally, an opening (called a conductive via) is employed to establish an electrical connection between conductive circuits that are vertically separated by the insulating layer.
FIGS. 1A to 1D are diagrams showing a known process for manufacturing a conductive via. In FIG. 1A, a substrate 1 is prepared that has, as its upper surface, a conductive layer 3. A base 2 for substrate 1 is composed of either a single insulating layer or a multi-layer substrate, preferably prepared by laminating multiple insulating and conductive circuit layers. In FIG. 1B, an insulating layer 4 is formed on conductive layer 3 using a photosensitive resin. In FIG. 1C, common photolithography is employed to form an opening (a via) 5 in insulating layer 4. And then, in FIG. 1D, a plating method is used to form a conductive layer 6 across insulating layer 4 and inside opening 5 to provide a conductive via. With the conductive via, an electrical connection is established between conductive layer 3 at the bottom of opening 5 and conductive layer 6 on insulating layer 4 surrounding opening 5.
According to the method in FIGS. 1A to 1D, normally, the conductive layer inside the via is thinner than the conductive layer outside the via. This becomes especially pronounced as the diameter of the via is reduced and its depth is increased. This occurs because when a plating method is used, for example, as the diameter of the via is reduced and its depth increased, an insufficient quantity of plating liquid is supplied to the via. Therefore, according to the conventional manufacturing method in FIG. 1, the time required for the plating of conductive layer 6 is extended in order for a conductive layer having an adequate thickness to be deposited in the via.
However, when the time for plating conductive layer 6 is increased, the thickness of conductive layer 6 on insulating layer 4 surrounding the via is accordingly increased until it becomes thicker than necessary. Then, when an additional insulating layer and conductive circuit layer are laminated on conductive layer 6, the thicknesses of the layers around the via are increased, and a step is formed. As a result, a crack may occur in the conductive circuit layer in the multi-layer structure, and the circuit connection is broken. Therefore, a problem exists arising from the increase in the thickness of plated conductive layer 6 surrounding the via and the formation of a step.
FIGS. 2A to 2D are diagrams showing one known method for attempting to resolve this problem. In FIG. 2A, photoresist (hereinafter resist) 7 is applied to the substrate (FIG. 1D) on which conductive via 5 is formed using conductive layer 6. Since resist 7 has low viscosity and satisfactory flowability, it flows into and substantially fills via 5. Then, in FIG. 2B, resist 7 on conductive layer 6, excluding that in via 5, is removed by surface polishing, which exposes all the surface of conductive layer 6 except for that inside via 5. Subsequently, in FIG. 2C, the exposed conductive layer 6 is removed by etching, except for the portion inside via 5 that is still covered by resist 7. Finally, in FIG. 2D, after the remaining resist 7 has been removed from the via 5, a conductive layer 8 is plated on the surface of the substrate. Conductive layer 8 adequately covers conductive layer 6 in via 5, and a comparatively thin conductive layer 8 is deposited on the surface of insulating layer 4. As a result, the problem arising from the increase in the thickness of conductive layer 6 surrounding via 5 and the forming of the step is resolved.
However, according to the method in FIG. 2, since photosensitive resist 7 is removed by surface polishing, the following problems arise:
(a) Since the surface polishing tends to be non-uniformly performed, part of resist 7 remains on conductive layer 6, and that part of conductive layer 6 that is covered by the remaining resist 7 is not removed by the etching. Therefore, when conductive layer 8 is formed, differences in thicknesses (protrusion) occur in some places on conductive layer 6. That is, the resultant surface of conductive layer 8 is not even.
(b) When the surface polishing is incomplete and resist 7 remains on conductive layer 6, etching of conductive layer 6 is not complete, and so-called under etching appears. As a result, the thickness of conductive layer 8 on the surface of the substrate cannot be controlled and a predetermined thickness attained. Further, since the differences in thicknesses (protrusions) occur in some places on conductive layer 6, the surface of conductive layer 8 is not flat.
It is, therefore, one object of the invention to provide, without a surface polishing process having to be performed, a circuit board having a conductive via that is filled with an adequate amount of conductive material and that can satisfactorily conduct electricity.
It is another object of the invention to provide a method for controlling the thickness of a conductive layer on the surface of a substrate and to form a conductive circuit having a flat surface.
It is an additional object of the invention to provide a reliable circuit board that, by using a conductive circuit having a conductive via that is filled with a conductive material, also has a flat surface.
According to the present invention, a positive resist is used to adequately fill in even a relatively deep via having a relatively small diameter, and photolithography is used to selectively expose and develop a substrate in the perpendicular direction. A circuit substrate is formed having a flat surface and a conductive via, in which an adequate amount of conductive material is introduced to provide a sound electrical connection. The substrate is so formed without having to perform a conventional surface polishing process.
More specifically, according to the present invention, a method for manufacturing a circuit board having a conductive via comprises the steps of providing a substrate having a first surface and a first conductive layer on at least one region of the first surface, forming an insulating layer on the first conductive layer, forming an opening in the insulating layer, the opening extending to the first conductive layer, forming a second conductive layer inside the opening and at least on the insulating layer near the opening, applying a positive photoresist on the second conductive layer, exposing the positive photoresist, developing the exposed positive photoresist, and removing the positive photoresist on the second conductive layer, except a portion of the second conductive layer that is inside the opening, etching the second conductive layer, to expose a surface of the second conductive, removing the positive photoresist from inside the opening, and forming a third conductive layer inside the opening.